Functional Units

9 Total Excecution Units

Integer Execution Unit (IEU)

• 2 Arithmetic Logic Units for integer excution parallelism
• Extended cycle integer multiply and divide paths
• 8 register ports for memory access

Floating Point Unit (FPU)

• 2 Issued/Excuted Floating Point Operations per cycle
• Most instructions are pipelined and finish in one cyle
• Divide and Square Root take 12 cycles in single precision and 22 cycles in double precision

	Operation	Sparc Throughput (cycles)	Latency (Cycles)
	Add (single)	1	3
	Add (double)	1	3
	Multiply (single)	1	3
	Multiply (double)	1	3
	Divide (single)	12	12
	Divide (double)	22	22
	Square Root (single)	12	12
	Square Root (double)	22	22

Load Store Unit (LSU)

• One load/store can be issued per cycle
• Generates all the virtual addresses for load/stores