Eliot -
It sounds something like this:
Initially, x = 0
Thread 1
x = 1
Thread 2
x = 2
Thread 3
r1 = x;
r2 = x;
r3 = x;
r4 = x;
r1 = 0, r2 = r4 = 1, r3 = 2
This is perfectly legal.
Jeremy
> Let me toss in my two cents, as the (co)designer of a concurrent GC
> algorithm ("Sapphire", now patented!).
>
> In Sapphire, we actually maintain, at some stages of the concurrent GC, TWO
> copies of non-volatile instance variables. We essentially assume mutator
> threads (i.e., not the collector) access non-volatiles in a race-free
> way. Specifically, the collector provides for the possibility of a race
> between one mutator writing a variable and the collector trying to copy it
> to a different place, but if there are TWO (or more) unsynchronized writes
> to the non-volatile, it is entirely possible that threads may observe the
> value change and then change back, with one or more writes not showing up
> in the new copy. In particular, if Thread 1 writes 1 into a variable that
> is initially 0, and Thread 2 writes 2, and this happens concurrently with
> collection, then depending on which copy of the variable Thread 3 reads,
> and when, it may see the value go from 0 to 1 to 2 and then back to 1. We
> do guarantee no "out of thin air" and that if there are no more writes, the
> value eventually stabilizes.
>
> My question is: In the memory model being proposed, is this behavior legal?
> (I am hoping so, since if it is not, my clever way of making my algorithm
> much cheaper than it would be for C (say) may be undermined.)
>
> I suppose I can frame this as a test case if pressed :-).
>
> -- Eliot
> ==============================================================================
> J. Eliot B. Moss, Associate Professor http://www.cs.umass.edu/~moss www
> Director, Arch. and Lang. Impl. Lab. +1-413-545-4206 voice
> Department of Computer Science +1-413-695-4226 cell
> 140 Governor's Drive, Room 372 +1-413-545-1249 fax
> University of Massachusetts at Amherst moss@cs.umass.edu email
> Amherst, MA 01003-9264 USA +1-413-545-3733 Priscilla Coe sec'y
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