Topics to be covered by 1^st exam

Chapter 1.6 -- Amdahl’s Law, ways of describing CPU performance (e.g. CPI, clock cycle time etc)

Chapter 1.7 -- Memory hierarchies

Chapter 2.1-2.6 -- instruction sets and addressing modes. I will not ask you to memorize the names of all of the addressing modes, but if I define some instructions and some addressing modes, you might have to use the addressing modes to write a few lines of assembly code

Chapter 3.1,3.2 -- Simple pipelines using DLX as an example.

Chapter 3.3-3.5 -- Pipeline hazards. Data hazards – RAW,WAW,WAR, compiler scheduling for data hazards, control hazards, delay slots, cancelling or nullifying branches, compiler (and manual) techniques for reordering instructions to improve pipeline performance.

We are not covering Chapter 3.6

Chapter 3.7 p 187-194 – Pipelines able to handle simultaneous, multicycle operations

Chapter 4.1 Loop unrolling, scheduling, data dependencies – real (or true) dependencies, antidependencies and output dependencies. Control dependencies. Loop level parallelism

Chapter 4.2 Dynamic scheduling – scoreboard and Tomasulo algorithms.