Don't We All need ARMs?

An Introduction to the ARM System Architecture

What is an ARM processor and why haven't I heard about it?

ARM - an acronym for: Advanced RISC Machines
The processor originated in England in 1984. At its inception ARM stood for Acorn RISC Machine. The first ARM reliant systems include the Acorn: BBC Micro, Masters, and the Archimedes. During this early period they were used mostly for British educational systems, and therefore, were not widely available or known outside England. However in 1987 the ARM became the first commercial RISC processor.
In 1990, the research section of Acorn separated from the parent company and formed: ARM Ltd. (Advanced RISC Machines Limited).
Other historical notables are that the Macintosh Apple ][GS was run by an ARM processor, as was the ill-fated Newton portable note-taking device. (Not ill-fated because of the processor but because of the market timing)

What is a RISC machine anyways? A brief overview

It is worthwhile to go over this concept since RISC is implied in the name! It also lends itself to the discussion of where some of the hardware choices, as well as claims that are made on this type of processor's performance, came from.

RISC is an acronym standing for "Reduced Instruction Set Computer", contrasted with a CISC machine (Complex Instruction Set Computer).
RISC claims of simplicity in comparison to CISC:
- Fixed 32-bit instruction size instead of variable
- Large register bank of GPR 32-bit registers
- Easier to prototype and put together
RISC Organization:
- Hard-wired instruction decode logic instead of microcoded ROMs to decode
- Pipelined execution
- Possible single cycle execution
RISC Advantages
- Smaller die sizes
- Shorter time to develop
- Possible higher performance than CISC
- High clock rate with single cycle
RISC Disadvantages
- Generally less code density than CISC
- Cannot execute x86 code, at least not without some sort of conversion and performance drawback

So, what make the ARM architecture so special?

The sales pitch goes something like this, "The ARM architecture has the best MIPS to Watts ratio as well as best MIPS to $ ratio in the industry; the smallest CPU die size; all the necessary computing capability coupled with low power consumption of which a highly flexible and customizable set of processors are available with options to choose from, all at a low cost."

Look at the list of currently available processors and their architectures.

As you ask yourself, "What does that all really mean?" lets see if we can help clarify things.

The fact that it is a simple hardware design and the fact that many things can be left off the chip, such as a FP multiplier as options, coupled with the fact that it is a RISC pipeline architecture all lend themselves to creating a chip with a very small die size.

Small die size translates into low cost since much of the cost of a chip is proportional to the die area.

Having small die area and simple pipeline construction allows the other major benefit of the ARM chip. Designers are able to use less hardware and make better hardware decisions to reduce the processor's power consumption.

The small size, low cost, and low power usage leads to one of the most common uses for an ARM processor today, embedded applications. Embedded environments like cell phones or PDAs (Personal Digital Assistants) require those benefits that this architecture provides. Sure, there has to be a trade-off between performance, cost, and size. But, the ARM fits into this category nicely. It has very small die size, its performance, although not on the cutting edge, is more than adequate for the tasks at hand, and most importantly, it is cheap and low in power consumption.

Go to the ARM application specific task of Digital Signal Processing.

But Wait, you ask, how can it have performance, low wattage, and simplicity, all at a low cost?

An Important factor that contributes to making such a claim true is its simple design using a not-so-fancy 5 stage pipeline. But, other contributing factors are as follows below.

ARM makers have been able to apply an instruction set called Thumb, which takes 32-bit instructions and compresses them down to 16-bits. This tactic enables programs to be coded much more densely than standard RISC instruction sets, not to mention cutting some portions of the hardware down in size.

Processors enabled to take advantage of Thumb also allow 32-bit instructions to run on the same processor. In fact, 16-bit and 32-bit instructions can be mixed together and the hardware will be able to decode and decompress at the same time without a performance hit, thus maintaining powerful computing capabilities.

Cost is minimized by having a simple, small structure with many configurations available. Small means less silicon, higher yield per wafer.

A simple pipeline and instruction set makes it easier to learn, optimize, and build, again saving on cost.

Check out the Thumb Instruction Set advantage.