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Question |
Raised by |
Status |
Solution |
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What
are some threats to validity when measuring development time? |
Alford, Ronald Wayne |
Need
Solution |
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In the
design phase, they consider the software part as machine independent when doing
static analysis and then consider the hardware components and machined
dependency while generating code? Why this distinction because the state of
the hardware can affect the static analysis. |
Bahety, Anand Baldeodas |
Need
Solution |
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Bucatanschi, Dan George |
Need
Question |
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Give a
detailed example illustrating the difference between CNPN & RTPN? |
Chandra, Deepti Jagdish |
Need
Solution |
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On page
662, the author lists a number of references about translating UML diagrams
into formal models that are complex to handle, targeted for a single purpose
and do not consider deployments. Then said that VERTAF uses two very simple
models RTPN/CCPN; what is the limitation of this? |
Huynh, Thuan Quang |
Need
Solution |
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Nguyen, Bao Ngoc |
Need
Question |
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Konda, Shravya Reddy |
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In the
paper the authors define software synthesis as a two-phase process: a
machine-independent software construction phase and a machine-dependent
software implementation phase. What is the advantage of this division? |
Lee, Joonghoon |
Need
Solution |
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What is
the advantage of VERTAF? Can it be used for applications non-real-time
applications? |
Liu, Liping |
Need
Solution |
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Explain
design and verification flow in VERTAF. How many phases and subphases are there and what are they? Give a brief
explanation for each of them. |
Wongsuphasawat, Krist |
Need
Solution |
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Why did
the authors need to talk about two different kinds of Petri nets? |
Reisner, Elnatan
Benjamin |
Need
Solution |
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Schulman, Aaron David |
Need
Question |
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Why did
the authors use static analysis and formal verification for testing their
proposed framework? What analysis procedure did they use? |
Sharara, Hossam Samy Elsai |
Need
Solution |
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What may
be done to extend this system so that it assists the developer with testing? |
Stuckman, Jeff |
Need
Solution |
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Two
different scheduling algorithms are used to address memory constraint and
temporal specification satisfaction.
Describe the primary differences between these two algorithms with
respect to the type of system on which they will be used and how they prepare
the respective system for scheduling. |
Teoh, Alison Lui Koon |
Need
Solution |
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In
VERTAF extended sequence diagram, timed state-charts and class diagram are
used for design phase only. Do they consider environmental issues of
real-time and embedded systems? |
Thakor, Shashvat Advait |
Need
Solution |
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Vador, Sachin Shashikant |
Need
Question |
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How does
VERTAF leverage UML models in testing embedded software? What extensions to
the UML standard were needed to support VERTAF, if any? |
Donlon, Eileen Merle |
Need
Solution |
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VERTAF
is a framework for formal verification of models. Which two model languages
does it support and what is the big difference between them? (Hint: think
about dining philosophers). |
Zazworka, Nico |
Need
Solution |
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