> -----Original Message-----
> From: Thomas Wang
>
> > Strong interpretation:
> > There is a happens-before (or release/acquire) relationship from
> > each write to each latter read of that volatile.
> >
> > Weak interpretation:
> > There is a happens-before (or release/acquire) relationship from
> > each write to each latter read of that volatile that sees
> that write.
>
> I examined the requirement of the strong interpretation. It
> seems the strong
> interpretation could be too strict. It almost required
> volatile writes
> to be made visible immediately, with infinite speed.
I'm not sure what you mean. IA64 with volatile write implemented
as st.rel + mf and volatile read implemented as ld.acq conforms
to the strong interpretation. It's not any cheaper to implement the
weak one. I don't think there's any difference on any current
hardware, for that matter. The only implementations issue seems
to be with DSMs.
>
> Where as the weak interpretation is just stating the obvious:
> if a volatile write was observed by a read, then the volatile
> write must
> have happened prior to the read.
And it implies that all memory operations prior to the write
are visible to memory operations performed after the corresponding read,
and the same for things that have a transitive happens-before
relationship. You should really think of a volatile write roughly
as conveying knowledge of that threads view of memory to any threads
that read that value from the volatile.
I'm still looking for an uncontrived example where the difference
between the two matters to the user.
Hans
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