Example 2: CPU, L1 Cache, L2 Cache and Memory/Disk

In this case, we have two levels of cache, and want to estimate the memory access time. This time, the L1 miss penalty, ${\rm MP_{\rm L1}}$ is broken into contributions from the L2 cache implementation and from the remainder of the hierarchy.

Under these assumptions, the memory access time ( ${\rm MAT}_{\rm ex2}$ is given by:

$${\rm MAT_{\rm ex2}} = {\rm HT_{\rm L1}} + {\rm MR_{\rm L1}} * ({\rm HT_{\rm L2}} + {\rm MR_{\rm L2}}* {\rm MP_{\rm L2}})$$