We have talked about buses for parallel transfer between
registers. For this problem, you will design a bus for serial
transfer between registers. The bus should be capable of transferring
(shifting) bits between any two registers. The register from
which the bit is coming is called the source register,
the register to which the bit goes is called the destination
register. A transfer causes the bit at the serial output of the
source register to be shifted into the serial inputs of both the
source and destination registers. The bit at the serial output
of the destination register is lost. For example, if the source
register contains 0011 and the destination contains 1010 before
the transfer, after the transfer they will contain 1001 (source)
and 1101 (destination). (This assumes a shift to the right.)
You have four shift registers (R 0, R 1, R 2, R 3) to interconnect
with the bus. Each register has a serial input I s, a serial
output Z s, and a shift control input S.. When S = 1 and the
clock pulses, the data in the register is shifted. When S=0
and the clock pulses, nothing happens.
The bus system you design should have select inputs to determine
the source register and destination register of the transfer.
(How many select inputs are needed?) Design the serial bus and
show a block diagram including all components and interconnections.