Acceptable answers are shown below.
| Letter | ||||
| 1.1 | anti-dependence | q | ||
| 1.2 | branch folding | d | ||
| 1.3 | superscalar machine | r or c | ||
| 1.4 | cache block identification | d | ||
| 1.5 | instruction latency | e | ||
| 1.6 | capacity miss | j | ||
| 1.7 | Amdahl's law | a | ||
| 1.8 | 500 Mhz | o | ||
| 1.9 | memory hierarchy | t or j | ||
| 1.10 | loop unrolling | g or i | ||
| 1.11 | dynamic scheduling | g or h | ||
| 1.12 | TLB | t | ||
| 1.13 | structural hazard | b or f | ||
| 1.14 | forwarding and bypassing | g or u | ||
| 1.15 | dynamic scheduling | g or h | ||
| 1.16 | dirty bits | j | ||
| 1.17 | WAW hazard | b | ||
| 1.18 | PDP 11, IBM 360 | k (old non-RISC architectures) | ||
| 1.19 | reorder buffer | c | ||
| c | 1.20 | implicit branch prediction | z (Branch target buffer w/o pred bits) |