Finite state machines: implementing | |||||||||||||||
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Notes: | |||||||||||||||
Label the address bits: A2A1A0 | |||||||||||||||
Connect inputs to address bits in order: q1q0x | |||||||||||||||
Label ROM addresses: 000 to 111 | |||||||||||||||
Label ROM data columns: Z1Z0D1T0 | |||||||||||||||
Don't include next state in ROM. Where does it go? | |||||||||||||||
D1 and T0 feed back to flip-flop inputs | |||||||||||||||
Leave the "don't cares" as they are | |||||||||||||||
Circle input x to show it comes from an external source | |||||||||||||||
Square the outputs z to show they are external | |||||||||||||||