Finite state machines: counter
Input Next Output ROM
q1 q0 x q1+ q0+ z1 z0 D1 D0 Address Data
0 0 0 0 0 0 0 0 0 000 0000
0 0 1 0 1 0 0 0 1 001 0001
0 1 0 0 1 0 1 0 1 010 0101
0 1 1 1 0 0 1 1 0 011 0110
1 0 0 1 0 1 0 1 0 100 1010
1 0 1 1 1 1 0 1 1 101 1011
1 1 0 1 1 1 1 1 1 110 1111
1 1 1 0 0 1 1 0 0 111 1100
4. Draw circuit: ROM
address: q1q0x
data: z1z0D1D0