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Labels |
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Branch Instructions and Labels |
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Do we want to have to
compute the value of the offset for a branch instruction? No. |
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too much work |
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subject to error |
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may need to change if
instructions are added or removed |
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better way: |
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beq
$r1, $r2, L1 # (0) If R[1] ==
R[2] goto L1 |
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addi $r1, $r1, 1 # (1) R[1]++ |
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addi $r2, $r2, 1 # (2) R[2]++ |
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L1:
add $r1, $r1, $r2 # (3) R[1] = R[1]
+ R[2] |
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L1 is
a label referring to the
address of the instruction where it is located |
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The assembler computes
the offset |
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target instruction -
(branch instruction + 1). |
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The same rule applies
even if you branch backwards |
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Why compute branch
instruction + 1? |
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Once
the instruction is fetched, PC is incremented to PC + 4, |
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next instruction in
memory |
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This kind of address
computation is called PC-relative |
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Jump Instructions and Labels |
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Jump instructions also
jump to labels (at least, j and jal) |
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Assembler figures out
the appropriate addresses using pseudo-direct addressing. |
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Disadvantage compared to
PC-relative addressing: It's harder to relocate the code |
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