Investigate the interactions between compiler optimizations and computer architectures to evaluate the most effective integrated approach to achieving high performance.

XMT is an architecture designed to efficiently exploit fine-grain parallelism on-chip. Explicitly parallel programs with a simple no busy-wait execution model are synchronized with a scalable prefix-sum instruction. Compiling for XMT requires creating efficient parallel threads and optimizations to coarsen threads.

Locality and the pervasive nature of RISC cache systems demand greater emphasis on customizing programs for caches with long lines and limited set associativity. Compilers can manipulate data layout to improve performance for both scalar and parallel programs. Integrating data and computation transformations will be challenging but worthwhile for large programs.

Scientific applications are becoming more complex as they enter larger and more complex problem domains. In particular, sparse and irregular data structures are becoming common. However, exploiting parallelism and locality in irregular computations is more difficult and require sophisticated run-time support. We are developing techniques to combine compiler and run-time support to improve locality and exploit parallelism for adaptive irregular computations.

Software DSMs such as CVM provide a convenient shared-memory programming model for message-passing machines. Compile-time information can be used to improve their performance for many scientific computations. Software DSMs can also serve as a convenient testbed for future multiprocessor architectures that support both message passing and a variety of coherence protocols for shared memory.